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SiC Process

 

EPISIL offer the 4” 600V/1200V SiC JBS and DMOS foundry. We have several advance for SiC process, such as high temperature furnace around 1400~2000, high temperature implant around 500, and wafer level test by WAT and CP. We focus on the JBS and DMOS produce and provide a platform from our standard process, also the niche product depend on each customer’s request.

 

 Process List

 

 

Standard Process :

JBS

Developing Process :

DMOS

Lithography :

Minimum Width 1.5um

Etching :

Wet etching and RIE dry etching

CVD :

PECVD and LPCVD SiO2, SiN

Implant :

Room temp. B,P,Sb & 500 high temp. Al,N,P

Furnace :

1400~2000 High temp. furnace

Metallization :

Al/Cu, Ti, TiN, Ni, Au, Ag

 

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